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DISCRETE SEMICONDUCTORS
DATA SHEET
e
M3D379
M3D461
BLF0810-180; BLF0810S-180 Base station LDMOS transistors
Preliminary specification 2002 Aug 02
Philips Semiconductors
Preliminary specification
Base station LDMOS transistors
FEATURES * Easy power control * Excellent ruggedness * High power gain * Excellent thermal stability * Designed for broadband operation (800 MHz to 1 GHz) * Internally matched for ease of use. APPLICATIONS * Common source class-AB operation applicable in the 860 to 960 MHz frequency range * CDMA and multi carrier applications. PINNING - SOT502A PIN 1 2 3 drain gate source; connected to flange DESCRIPTION
BLF0810-180; BLF0810S-180
DESCRIPTION 180 W LDMOS power transistor for base station applications at frequencies from 800 MHz to 1000 MHz. Typical CDMA IS95 performance at standard settings at a supply voltage of 28 V and IDQ = 1125 mA, channel bandwidth is 30 kHz, adjacent channels at 750 kHz and at 1.98 MHz: Output power = 35 W Gain = 15.6 dB Efficiency = 26 % ACPR <-45 dBc at 750 kHz and BW = 30 kHz ACPR <-63 dBc at 1.98 MHz and BW = 30 kHz
PINNING - SOT502B PIN 1 2 3 drain gate source; connected to flange DESCRIPTION
handbook, halfpage
1
1 3
2 Top view
3
MBK394
2 Top view
MBL105
Fig.1 Simplified outline SOT502A (BLF0810-180)
Fig.2 Simplified outline SOT502B (BLF0810S-180)
QUICK REFERENCE DATA Typical RF performance at T h = 25 C in a common source test circuit. MODE OF OPERATION Class-AB (2-tone) CDMA(1) CDMA multi carrier signal(4) Note 1. IS95 CDMA (Pilot, Paging, Sync, and Trafic Codes 8 trough 13) 2. ACPR 750 kHz at BW = 30 kHz 3. ACPR 1.98 MHz at BW = 30 kHz 4. 3 adjacent carriers with 32 channels walsh codes each. 2002 Aug 02 2 f (MHz) f1 = 890.0 f2 = 890.1 881.5 881.5 VDS (V) 28 28 28 PL (W) 140 (PEP) 32 14 Gp (dB) 15.2 15.6 15.6 D (%) 35 26 16 d3 (dBc) -30 - - ACPR (dB) - <-45 (2) <-63 (3) <-52 (2) <-56 (3)
Philips Semiconductors
Preliminary specification
Base station LDMOS transistors
BLF0810-180; BLF0810S-180
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134). SYMBOL VDS VGS Tstg Tj PARAMETER drain-source voltage gate-source voltage storage temperature junction temperature CONDITIONS - - -65 - MIN. MAX. 75 15 150 200 V V C C UNIT
THERMAL CHARACTERISTICS SYMBOL Rth j-c Rth hs-j Note 1. Thermal resistance is determined under RF operating conditions. 2. Depends of installation. CHARACTERISTICS Tj = 25 C unless otherwise specified. SYMBOL V(BR)DSS VGSth IDSS IDSX IGSS gfs RDSon PARAMETER drain-source breakdown voltage gate-source threshold voltage drain-source leakage current on-state drain current gate leakage current forward transconductance drain-source on-state resistance CONDITIONS VGS = 0; ID = 3 mA VDS = 10 V; ID = 300 mA VGS = 0; VDS = 36 V VGS = VGS(th) + 9 V; VDS = 10 V VGS = 20 V; VDS = 0 VDS = 10 V; ID = 10 A VGS = 9 V; ID = 10 A MIN. 75 4 - 45 - - - TYP. - - - - - 9 60 MAX. - 5 1 - 1 - - UNIT V V A A A S m PARAMETER thermal resistance from junction to case thermal resistance from heatsink to junction CONDITIONS Th = 25 C, PL = 35 W avg, note 1 Th = 25 C, PL = 32 W avg, note 2 VALUE <0.42 <0.62 UNIT K/W K/W
2002 Aug 02
3
Philips Semiconductors
Preliminary specification
Base station LDMOS transistors
APPLICATION INFORMATION RF performance in a common source class-AB circuit. T h = 25 C;. MODE OF OPERATION Class-AB (2-tone) CDMA(1) CDMA multi carrier signal(4) Note 1. IS95 CDMA (Pilot, Paging, Sync, and Trafic Codes 8 trough 13) 2. ACPR 750 kHz at BW = 30 kHz 3. ACPR 1.98 MHz at BW = 30 kHz 4. 3 adjacent carriers with 32 channels walsh codes each. Ruggedness in class-AB operation f (MHz) f1 = 890.0 f2 = 890.1 881.5 881.5 VDS (V) 28 28 28 PL (W) 140 (PEP) 32 14
BLF0810-180; BLF0810S-180
IDQ (mA) 1125 1250 1250
Gp (dB) 15.2 15.6 15.6
D (%) 35 26 16
d3 (dBc) -30 - -
ACPR (dB) - <-45 (2) <-63 (3) <-52 (2) <-56 (3)
The BLF0810-180 and BLF0810S-180 are capable of withstanding a load mismatch corresponding to VSWR = 15 : 1 through all phases at VDS = 27 V; PL = 126 W (PEP).
50 (%) 40
17
(4) (1,2,3) gain (dB)
16.5 16
-20 d3 (dBc) -30
30
(5)
15.5 15
-40
(1)
20
(6)
-50
10
14.5 14 150 PL (PEP) (W)
(2)
(3)
0 0 50 100
-60 0 50 100 150 PL (PEP) (W)
VDS = 27 V;IDQ = 1.1 A; f1 = 890.0 MHz; f2 = 890.1 MHz. Efficiency at T heatsink: (1) = -40 C (4) = -40 C Gain at T heatsink: (2) = 20 C (5) = 20 C (3) = 80 C (6) = 80 C
VDS = 27 V;IDQ = 1.1 A; f1 = 890.0 MHz; f2 = 890.1 MHz T heatsink: (1) = -40 C (2) = 20 C (3) = 80 C
Fig.3
Two tone power gain and efficiency as functions of the load power at different temperatures. 4
Fig.4
Third order intermodulation distortion as a function of the load power at different temperatures.
2002 Aug 02
Philips Semiconductors
Preliminary specification
Base station LDMOS transistors
BLF0810-180; BLF0810S-180
-30 d5 (dBc) -40
(3) (2) (1)
-40 d7 (dBc)
(3) (2)
-50
(1)
-50
-60 -60
-70 0 50 100 150 PL (PEP) (W)
-70 0 50 100 150 PL (PEP) (W)
VDS = 27 V;IDQ = 1.1 A; f1 = 890.0 MHz; f2 = 890.1 MHz Theatsink : (1) = -40 C (2) = 20 C (3) = 80 C
VDS = 27 V;IDQ = 1.1 A; f1 = 890.0 MHz; f2 = 890.1 MHz T heatsink: (1) = -40 C (2) = 20 C (3) = 80 C
Fig.5
Fifth order intermodulation distortion as a function of the load power at different temperatures.
Fig.6
Seventh order intermodulation distortion as a function of the load power at different temperatures.
0 20 gain (dB)
(2)
40 D (%) 30
dim (dBc) -20
15
(1)
(1)
-40 10
(3)
20
(4)
(4) (5) (3)
(2)
(6)
-60 5 10
-80 0 0 50 0 100 150 PL (PEP) (W) 0 50 100 150 PL (PEP) (W)
VDS = 27 V; f1 = 890.0 MHz; f2 = 890.1 MHz. Gain: Efficiency: (1) : I DQ = 1.0 A; (2) : I DQ = 1.45 A (3) : IDQ = 1.0 A; (4) : IDQ = 1.45 A
VDS = 27 V; f1 = 890.0 MHz; f2 = 890.1 MHz. I DQ = 1.0 A: (1) = d3 I DQ = 1.3 A: (4) = d3 (2) = d 5 (5) = d 5 (3) = d 7; (6) = d7;
Fig.7
Two tone power gain and efficiency as functions of the load power and IDQ .
Fig.8
Intermodulation distortion as a function of the load power
2002 Aug 02
5
Philips Semiconductors
Preliminary specification
Base station LDMOS transistors
BLF0810-180; BLF0810S-180
-45 ACPR (dBc) -50
(2)
-40 ACPR (dBc)-45 -50
(1)
-55 -60
-55 -60 -65 -70 -75 40 41 42 43 44 45 PL (avg) (dBm)
(4) (3) (1) (2)
-65 -70 -75 0 5 10 15 20 25 30 35 40 PL (PEP) (W)
(3) (4)
VDS = 27 V; f = 894 MHz; ACPR @750 kHz: (1): I DQ = 1.1 A (2):I DQ = 1.4 A; ACPR @1.98 MHz: (4):IDQ = 1.4 A (3):I DQ = 1.1 A
VDS = 27 V; f = 890 MHz; IDQ = 1.1 A; ACPR @750 kHz: (1): Theatsink = 20 C ACPR @1.98 MHz: (3): Theatsink = 20 C (2): Theatsink = 80 C; (4): Theatsink = 80 C.
Fig.9
CDMA IS95 ACPR distortion as a function of the average load power and IDQ .
Fig.10 CDMA IS95 ACPR distortion as a function of the load power at different temperatures.
2002 Aug 02
6
Philips Semiconductors
Preliminary specification
Base station LDMOS transistors
BLF0810-180; BLF0810S-180
2 ZIN () 1.5
ri
2 ZL () 1.5 1
RL
1 0.5 0
xi
0.5 0 -0.5 -1 0.85
XL
-0.5 -1 0.85
0.9
0.95 f (GHz)
1
0.9
0.95 f (GHz)
1
Class-AB operation; V DS = 27 V; I DQ = 1125 mA; P L = 35 W.
Class-AB operation; V DS = 27 V; I DQ = 1125 mA; P L = 35 W.
Fig.11 Input impedance as a function of frequency (series components):typical values; values compromised for different parameters
Fig.12 Load impedance as a function of frequency (series components); typical values; values compromised for different parameters.
DRAIN
BLF0180-180
ZL GATE
ZIN
Fig.13 Definition of transistor impedance. 2002 Aug 02 7
2002 Aug 02
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Philips Semiconductors
Base station LDMOS transistors
8
8$ G'
8
8 8' G "
!
BLF0810-180; BLF0810S-180
8
%
8
#
Preliminary specification
Fig.14 Circuit for 860 to 900 MHz test circuit.
2002 Aug 02
WivhAD G! 8! R 8( 8" 8# S G" G 8 G! G# 8$ G% G& G' G G 8" 8' 8 G$ 8' G % G$ 8& G# 8 Wq D 8% G( R! 8& 8$
Philips Semiconductors
Base station LDMOS transistors
9
8! G"
BLF0810-180; BLF0810S-180
8%
8#
Preliminary specification
Dimensions in mm. The components are situated on one side of the copper-clad Rogers 6006 printed-circuit board (r = 6.15); thickness = 25 mils. The other side is unetched and serves as a ground plane.
Fig.15 Circuit for 860 to 900 MHz test circuit.
Philips Semiconductors
Preliminary specification
Base station LDMOS transistors
List of components COMPONENT C1, C6, C13, C14, C15, C16, C17 C2 C3 C4, C9, C10, C11, C12 C5, C18 C7, C8 R1 Q1 Q2 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12, L13 L14 L15, L16 Notes DESCRIPTION multilayer ceramic chip capacitor; note 1 multilayer ceramic chip capacitor; note 1 multilayer ceramic chip capacitor; note 1 tantalum capacitor air trimmer capacitor multilayer ceramic chip capacitor potentiometer 7808 voltage regulator BLF0910-140 LDMOS transistor stripline; note 2 stripline; note 2 stripline; note 2 stripline; note 2 Ferroxcube stripline; note 2 stripline; note 2 stripline; note 2 stripline; note 2 stripline; note 2 stripline; note 2 stripline; note 2 stripline; note 2 stripline; note 2
BLF0810-180; BLF0810S-180
VALUE 68 pF 330 nF 100 nF 10 F 5 pF 8.2 pF 1 k
DIMENSIONS
5.22 x 0.92 mm 6.47 x 0.92 mm 5.38 x 4.8 mm 2.4 x 0.92 mm 9.73 x 0.92 mm 1.82 x 9.3 mm 8.15 x 17.9 mm 44 x 0.92 mm 18.45 x 28.3 mm 9.95 x 5.38 mm 37.6 x 3.35 mm 2.36 x 0.92 mm 4.22 x 0.92 mm
1. American Technical Ceramics type 100A or capacitor of same quality. 2. The striplines are on a double copper-clad Rogers 6006 printed-circuit board (r = 6.15); thickness = 0.64 mm
2002 Aug 02
10
Philips Semiconductors
Preliminary specification
Base station LDMOS transistors
PACKAGE OUTLINE
BLF0810-180; BLF0810S-180
Flanged LDMOST ceramic package; 2 mounting holes; 2 leads
SOT502A
D
A
3
D1
F
U1 q C
B c
1
L
H
U2
p w1 M A M B M
E1
E
A
2
b w2 M C M Q
0
5 scale
10 mm
DIMENSIONS (millimetre dimensions are derived from the original inch dimensions) UNIT mm inches A 4.72 3.99 0.186 0.157 b 12.83 12.57 c 0.15 0.08 D D1 E 9.50 9.30 E1 9.53 9.25 F 1.14 0.89 H 19.94 18.92 L 5.33 4.32 p 3.38 3.12 Q 1.70 1.45 q 27.94 U1 34.16 33.91 1.345 1.335 U2 9.91 9.65 0.390 0.380 w1 0.25 0.01 w2 0.51 0.02
20.02 19.96 19.61 19.66 0.788 0.786 0.772 0.774
0.505 0.006 0.495 0.003
0.374 0.375 0.366 0.364
0.045 0.785 0.035 0.745
0.210 0.133 0.170 0.123
0.067 1.100 0.057
OUTLINE VERSION SOT502A
REFERENCES IEC JEDEC EIAJ
EUROPEAN PROJECTION
ISSUE DATE 99-10-13 99-12-28
2002 Aug 02
11
Philips Semiconductors
Preliminary specification
Base station LDMOS transistors
PACKAGE OUTLINE
BLF0810-180; BLF0810S-180
Earless flanged LDMOST ceramic package; 2 leads
SOT502B
Package under development
Philips Semiconductors reserves the right to make changes without notice.
D
A F
3
D1 D
U1
c
L
1
H
U2
E1
E
2
b w2 M D M Q
0
5 scale
10 mm
DIMENSIONS (millimetre dimensions are derived from the original inch dimensions) UNIT mm inches A 4.72 3.99 0.186 0.157 b 12.83 12.57 c 0.15 0.08 D D1 E 9.50 9.30 E1 9.53 9.25 F 1.14 0.89 H 19.94 18.92 L 5.33 4.32 0.210 0.170 Q 1.70 1.45 U1 20.70 20.45 U2 9.91 9.65 w2 0.25
20.02 19.96 19.61 19.66 0.788 0.786 0.772 0.774
0.505 0.006 0.495 0.003
0.374 0.375 0.366 0.364
0.045 0.785 0.035 0.745
0.067 0.815 0.057 0.805
0.390 0.010 0.380
OUTLINE VERSION SOT502B
REFERENCES IEC JEDEC EIAJ
EUROPEAN PROJECTION
ISSUE DATE 99-12-16 99-12-28
2002 Aug 02
12
Philips Semiconductors
Preliminary specification
Base station LDMOS transistors
DATA SHEET STATUS DATA SHEET STATUS(1) Objective data PRODUCT STATUS(2) Development
BLF0810-180; BLF0810S-180
DEFINITIONS This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A.
Preliminary data
Qualification
Product data
Production
Notes 1. Please consult the most recently issued data sheet before initiating or completing a design. 2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
DEFINITIONS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
DISCLAIMERS Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
CAUTION This product is supplied in anti-static packing to prevent damage caused by electrostatic discharge during transport and handling. For further information, refer to Philips specs.: SNW-EQ-608, SNW-FQ-302A and SNW-FQ-302B.
2002 Aug 02
13
Philips Semiconductors - a worldwide company
Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
(c) Koninklijke Philips Electronics N.V. 2001 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
SCA73
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
budgetnum/printrun/ed/pp14
Date of release: 2002
Aug 02
Document order number:
9397 750 10684

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